The shift instructions of the 8086 microprocessor are used for shifting the bits in a memory location or a register. The shifting of bits is done arithmetically or logically to the left (left shift) or to the right (right shift) according to the value of count given in the instruction that indicates the number of shifts to be done. The shift instructions in the 8086 microprocessor are,
- SHL (Shift Left) Instruction,
- SAL (Shift Arithmetic Left) Instruction,
- SHR (Shift Right) Instruction,
- SAR (Shift Arithmetic Right) Instruction.
In the above shift instructions, both SHL and SAL have the same operation. To perform multiplications and divisions on binary numbers by powers of two, arithmetic shifts are used. The logical shifts fill the shifted bit portion by zero i.e., fill zero in LSB position in case of SHL and SAL, and fill zero in MSB position in case of SHR. Let us learn briefly about each shift instruction in the 8086 microprocessor.
SHL/SAL Instruction :
This instruction stands for Shift Logical/Arithmetic Left. The SHL/SAL instruction performs shifting of each bit in the operand (register or memory location) to the left side and fills the least significant bit (LSB) with zero and obtain the result in the destination operand. The MSB is shifted into the carry flag (CF). The operation of SHL/SAL instruction with 2 times shift is shown below.
The number of shifts of bits is given as the count in the instruction and all the flags are affected according to the result. If the number of shifts required is one, then one is mentioned at the count position of the instruction. In case of shifting the bits for two or more than two times, CL register must be used at the count position which is loaded with the value of the number of shifts required (i.e., shift count) as shown in the below examples.
Example for SHL/SAL Instruction :
| Instruction | Explanation |
|---|---|
| SAL CX, 1 | ; shift bits in CX 1-bit left ; puts 0 in LSB and MSB in CF |
| SHL AX, CL | ; Left shift bits in AX for 5 times (assume CL = 05H) ; puts 0’s in 5 LSB’s and last MSB in CF |
SHR Instruction :
This instruction stands for shift Logical Right. The SHR instruction performs shifting of each bit in the operand (register or memory location) to the right side and fills the most significant bit (MSB) with zero. The LSB is shifted into the carry flag (CF). The operation of SHR instruction with 2 times shift is shown below.
Here also the number of shifts of the bits is given as the count in the instruction and all the flags are affected according to the result. If the shift count is one, then it is directly mentioned in the instruction. For shifting the bits, two or more than two times, CL register must be used at the count position which is loaded with shift count value as shown in the below examples.
Example for SHR Instruction :
| Instruction | Explanation |
|---|---|
| SHR CX, 1 | ; shift bits in CX 1-bit right ; puts 0 in MSB and LSB in CF |
| SHR AX, CL | ; Right shift bits in AX for 5 times (assume CL = 05H) ; puts 0’s in 5 MSB’s and last LSB in CF |
SAR Instruction :
This instruction stands for Shift Arithmetic Right. It does the same operation as SHR except it fills the bit portion shifted right from the MSB with a copy of old MSB i.e., the SAR instruction performs the right shift on each bit and fills the MSB portion with the copy of old MSB. The operation of SAR instruction with 2 times shift is shown below.
Similar to SHR, in SAR instruction, LSB is shifted to carry flag (CF). In the case of multiple shifts, the CF contains the most recent shift bit and all the flags are affected according to the result.
Example for SAR Instruction :
| Instruction | Explanation |
|---|---|
| SAR CX, 1 | ; shift bits in CX 1-bit right ; puts copy of old MSB in MSB and LSB in CF |
| SAR AX, CL | ; Right shift bits in AX for 5 times (assume CL = 05H) ; puts 5 old MSB in 5 MSB’s portion |